HDL-DH:Junior/ Senior FPGA Engineer - multiple positions in Belgrade and Curpija

You will be part of the team working on the high-speed 100k+ gates FPGA design using VHDL and/or Verilog (Xilinx and/or Altera) with simulation using Cadence/Mentor simulators. The position requires a close working with the different hardware and software engineering teams; consequently, the candidate must have the knowledge and the interpersonal skills to be able to fit into very focused group of people working on very complex product development.

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